Key Takeaways
- KiCad 8 generates Gerber X2 metadata by default, but high-volume Asian fabs (JLCPCB, PCBWay) still require standard RS-274X or Protel file extension mappings.
- Never merge PTH (plated) and NPTH (unplated) holes into a single drill file unless explicitly requested by your CAM house, as unplated holes require a secondary machining pass after electroplating.
- Always select 'Drill/place file origin' if an auxiliary axis is placed in Pcbnew, or leave both Plot and Drill dialogs set to 'Absolute coordinates' to avoid offset misalignments.
- Verify that the Edge.Cuts perimeter forms a mathematically closed loop without overlapping vertices or micro-gaps before exporting.
1. KiCad 8 Plot Dialog: RS-274X vs Gerber X2
The KiCad 8 layout editor (Pcbnew) includes a thoroughly modernized Plot dialog (File -> Plot). While KiCad 8 natively supports the advanced Gerber X2 standard—embedding layer function attributes, netlist connectivity, and component footprint identifiers directly into header blocks—selecting between RS-274X and Gerber X2 depends entirely on your targeted manufacturing partner.
For modern European fabricators such as Eurocircuits, leaving 'Include Gerber X2 metadata' and 'Include netlist attributes' checked enables automated multi-layer stackup verification and electrical net checks. However, high-volume automated CAM pipelines in Shenzhen (e.g., JLCPCB, PCBWay) frequently parse Gerber archives using legacy RS-274X parsers. Inadvertently enabling X2 netlist attributes on these services can trigger parsing warnings or layer recognition failures.
To ensure 100% universal compatibility across all global fabricators, configure the following general options in the KiCad 8 Plot window:
1. Plot format: Gerber
2. Include layers: Select all active copper layers (F.Cu, B.Cu, In*.Cu), solder masks (F.Mask, B.Mask), silkscreens (F.Silks, B.Silks), paste masks (F.Paste, B.Paste if ordering SMT stencils), and the mechanical outline (Edge.Cuts).
3. Plot on all layers: Leave Edge.Cuts UNCHECKED under 'Plot on all layers'. The board outline must remain strictly inside its own dedicated layer file rather than being stamped across your copper artwork.
4. Coordinate format: 4.6, unit: Millimeters.
In KiCad 8, checking 'Use Protel filename extensions' replaces generic .gbr extensions with classic .GTL, .GBL, .GTS, and .GBS extensions. Enabling this option guarantees instant 1-click automatic layer recognition on JLCPCB and PCBWay web ordering portals without manual layer assignment.
%FSLAX46Y46*%
%MOMM*%
%TF.GenerationSoftware,KiCad,Pcbnew,8.0.4*%
%TF.CreationDate,2026-09-20T14:32:10Z*%
%TF.FileFunction,Copper,L1,Top*%
%TF.FilePolarity,Positive*%
%LPD*%
%ADD10C,0.150000*%2. NC Drill Setup: PTH vs NPTH and Auxiliary Origins
Once the vector layers are plotted, open the Generate Drill Files dialog (File -> Fabrication Outputs -> Drill Files...). Drill export errors represent the single most common cause of fabrication holds on KiCad projects.
The critical distinction in PCB drilling is between Plated Through-Holes (PTH) and Non-Plated Through-Holes (NPTH). PTH holes (vias, through-hole IC pins, connectors) undergo an electroless chemical copper deposition bath followed by electrolytic copper plating to establish electrical conductivity through the barrel. Conversely, NPTH holes (chassis mounting holes, alignment dowel pins, mechanical snap-fits) must remain bare fiberglass laminate.
If you select 'Merge PTH and NPTH into one file', the fabricator's CAM system will either plate all holes (causing mounting screws to short to internal power planes) or pause your order to ask for clarification. Always select 'Generate separate files for plated and non-plated holes'.
Another frequent failure mode is the Auxiliary Axis (Drill/place file origin) trap. If you placed an Auxiliary Origin marker in Pcbnew (typically at the bottom-left corner of the PCB outline) and select 'Drill/place file origin' in the Drill dialog, you MUST ALSO check 'Use drill/place file origin' in the Plot dialog. If one dialog uses the Page Absolute Origin and the other uses the Auxiliary Origin, your drill holes will be physically shifted hundreds of millimeters away from your copper pads.
Always ensure that Drill Origin and Plot Origin match identically. Either set both to 'Absolute' (recommended for simplicity) or set both to 'Drill/place file origin'. Never mix the two settings.
| Output File Type | KiCad 8 Naming | Protel / Legacy Naming | Fabrication Purpose |
|---|---|---|---|
| Plated Drill (PTH) | project.drl | project.TXT | Vias and through-hole component pins (copper plated) |
| Non-Plated Drill (NPTH) | project-NPTH.drl | project-NPTH.TXT | Mounting holes, tooling holes (no copper plating) |
| Buried / Blind Drill | project-1-2.drl | project-1-2.TXT | Micro-vias between specific internal layer pairs |
| Drill Map File | project-drl_map.gbr | project-drl_map.gbr | Visual inspection reference drawing (do not fabricate) |
3. Edge.Cuts Validation & Closed Loop Integrity
The Edge.Cuts layer defines the physical perimeter of the printed circuit board, along with internal rectangular cutouts, routing slots, and break-away mouse-bites. In automated CNC milling, the router bit follows the centerline of the Edge.Cuts vector path to cut the board from the manufacturing panel.
Fabricator CAM software requires the board outline to be a single, mathematically closed polygon. Common errors in KiCad 8 include:
1. Micro-Gaps: Two line segments appear to touch on screen, but their coordinate endpoints differ by a fraction of a millimeter (e.g., 0.05mm). This prevents the CAM router from calculating a closed toolpath.
2. Overlapping or Crossing Vectors: Drawing duplicate line segments on top of each other causes routing bit collisions in CAM toolpath generation.
3. Stray Graphical Elements: Text labels, measurement dimensions, or crosshair markers inadvertently drawn on Edge.Cuts cause the CAM software to miscalculate the total board bounding box, resulting in inflated manufacturing pricing quotes.
Before exporting, run KiCad 8's built-in Design Rules Checker (Inspect -> Design Rules Checker) and verify that 'Board contour is valid' reports zero errors.
4. Fabricator Compatibility (JLCPCB, PCBWay, Eurocircuits)
Different fabrication houses use different heuristics to automatically parse layer functions from filenames. To eliminate ordering delays, adopt the standard naming convention expected by your fabrication house:
| Layer Function | KiCad 8 Default | JLCPCB Recommended | PCBWay Recommended |
|---|---|---|---|
| Top Copper | project-F_Cu.gbr | project.GTL | project.GTL |
| Bottom Copper | project-B_Cu.gbr | project.GBL | project.GBL |
| Top Solder Mask | project-F_Mask.gbr | project.GTS | project.GTS |
| Bottom Solder Mask | project-B_Mask.gbr | project.GBS | project.GBS |
| Top Silkscreen | project-F_Silkscreen.gbr | project.GTO | project.GTO |
| Bottom Silkscreen | project-B_Silkscreen.gbr | project.GBO | project.GBO |
| Board Outline | project-Edge_Cuts.gbr | project.GKO (or .GML) | project.GM1 (or .GKO) |
| Drill File | project.drl | project.TXT | project.drl |
5. Step-by-Step Pre-Export & In-Browser Verification
Follow this foolproof 6-step pre-export protocol whenever finalizing a KiCad 8 board for production:
- Run Design Rules Check (DRC): Ensure 0 unrouted nets, 0 clearance violations, and verify that the board outline is a closed contour.
- Configure Plot Dialog: Select all required layers, check 'Use Protel filename extensions', uncheck 'Plot on all layers' for Edge.Cuts, and choose Absolute origin.
- Generate Drill Files: Choose Excellon format, check 'Generate separate files for plated and non-plated holes', units in mm, and match the Plot origin.
- Bundle into a Single ZIP: Compress all generated .gbr, .GTL, .GBL, .drl, and .TXT files into a clean archive.
- In-Browser Pre-Flight Audit: Drop the ZIP directly into GerberPatch. Toggle layer visibility to verify concentric drill alignment and inspect solder mask clearances.
- Measure Board Dimensions: Use the GerberPatch Caliper tool (M key) to measure the exact board width and height, verifying it matches your fabrication order quotation.
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